Renesas Electronics, 32bit RXv2 CPU, RX Microcontroller, 120MHz, 4 (ROM) MB, 64 (Flash) kB Flash, ROM, 176-Pin LQFP
- RS Stock No.:
- 901-5468P
- Mfr. Part No.:
- R5F564MLCDFC#V1
- Manufacturer:
- Renesas Electronics
Unavailable
RS will no longer stock this product.
- RS Stock No.:
- 901-5468P
- Mfr. Part No.:
- R5F564MLCDFC#V1
- Manufacturer:
- Renesas Electronics
Specifications
Technical data sheets
Legislation and Compliance
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Renesas Electronics | |
| Family Name | RX | |
| Package Type | LQFP | |
| Mounting Type | Surface Mount | |
| Pin Count | 176 | |
| Device Core | RXv2 CPU | |
| Data Bus Width | 32bit | |
| Program Memory Size | 4 (ROM) MB, 64 (Flash) kB | |
| Maximum Frequency | 120MHz | |
| RAM Size | 512 kB | |
| USB Channels | 1 x OTG, 1 x Peripheral | |
| Number of PWM Units | 0 | |
| Typical Operating Supply Voltage | 2.7 → 3.6 V | |
| Minimum Operating Temperature | -40 °C | |
| Width | 24.1mm | |
| Dimensions | 24.1 x 24.1 x 1.55mm | |
| Maximum Operating Temperature | +85 °C | |
| Number of ADC Units | 2 | |
| Height | 1.55mm | |
| Length | 24.1mm | |
| ADCs | 1 (21 x 12 bit), 1 (8 x 12 bit) | |
| Instruction Set Architecture | CISC Harvard | |
| Program Memory Type | Flash, ROM | |
| Maximum Number of Ethernet Channels | 2 | |
| Select all | ||
|---|---|---|
Brand Renesas Electronics | ||
Family Name RX | ||
Package Type LQFP | ||
Mounting Type Surface Mount | ||
Pin Count 176 | ||
Device Core RXv2 CPU | ||
Data Bus Width 32bit | ||
Program Memory Size 4 (ROM) MB, 64 (Flash) kB | ||
Maximum Frequency 120MHz | ||
RAM Size 512 kB | ||
USB Channels 1 x OTG, 1 x Peripheral | ||
Number of PWM Units 0 | ||
Typical Operating Supply Voltage 2.7 → 3.6 V | ||
Minimum Operating Temperature -40 °C | ||
Width 24.1mm | ||
Dimensions 24.1 x 24.1 x 1.55mm | ||
Maximum Operating Temperature +85 °C | ||
Number of ADC Units 2 | ||
Height 1.55mm | ||
Length 24.1mm | ||
ADCs 1 (21 x 12 bit), 1 (8 x 12 bit) | ||
Instruction Set Architecture CISC Harvard | ||
Program Memory Type Flash, ROM | ||
Maximum Number of Ethernet Channels 2 | ||
- COO (Country of Origin):
- CN