Nexperia 74HC574PW,118 1 Flip Flop IC 74HC, 3 State, 20-Pin TSSOP
- RS Stock No.:
- 170-5409
- Mfr. Part No.:
- 74HC574PW,118
- Manufacturer:
- Nexperia
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Subtotal (1 pack of 50 units)*
MYR77.20
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Units | Per Unit | Per Pack* |
|---|---|---|
| 50 - 600 | MYR1.544 | MYR77.20 |
| 650 - 1200 | MYR1.467 | MYR73.35 |
| 1250 + | MYR1.394 | MYR69.70 |
*price indicative
- RS Stock No.:
- 170-5409
- Mfr. Part No.:
- 74HC574PW,118
- Manufacturer:
- Nexperia
Specifications
Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Nexperia | |
| Product Type | Flip Flop IC | |
| Logic Family | 74HC | |
| Input Type | CMOS | |
| Output Type | 3 State | |
| Clock Frequency | 24MHz | |
| Polarity | Non-Inverting | |
| Mount Type | Surface | |
| Package Type | TSSOP | |
| Minimum Supply Voltage | 2V | |
| Maximum Supply Voltage | 6V | |
| Pin Count | 20 | |
| Trigger Type | Positive Edge | |
| Flip-Flop Type | D Flip-Flop | |
| Maximum Propagation Delay Time @ CL | 38ns | |
| Minimum Operating Temperature | -40°C | |
| Number of Elements per Chip | 1 | |
| Maximum Operating Temperature | 125°C | |
| Standards/Approvals | No | |
| Height | 0.95mm | |
| Length | 6.6mm | |
| Automotive Standard | No | |
| Select all | ||
|---|---|---|
Brand Nexperia | ||
Product Type Flip Flop IC | ||
Logic Family 74HC | ||
Input Type CMOS | ||
Output Type 3 State | ||
Clock Frequency 24MHz | ||
Polarity Non-Inverting | ||
Mount Type Surface | ||
Package Type TSSOP | ||
Minimum Supply Voltage 2V | ||
Maximum Supply Voltage 6V | ||
Pin Count 20 | ||
Trigger Type Positive Edge | ||
Flip-Flop Type D Flip-Flop | ||
Maximum Propagation Delay Time @ CL 38ns | ||
Minimum Operating Temperature -40°C | ||
Number of Elements per Chip 1 | ||
Maximum Operating Temperature 125°C | ||
Standards/Approvals No | ||
Height 0.95mm | ||
Length 6.6mm | ||
Automotive Standard No | ||
The 74HC574: 74HCT574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops.
Mixed 5 V and 3.3 V applications
Improved signal integrity with integrated termination resistors
High noise immunity
Flow through pin out for easy layout
Wide supply voltage range
Low propagation delay
Overvoltage tolerant input options
Integrated source termination resistor options
Bus hold options
Frequency division
Controlled delays
Interface between asynchronous and synchronous systems
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