- RS Stock No.:
- 153-2935
- Mfr. Part No.:
- 74AUP2G08DC,125
- Manufacturer:
- Nexperia
4650 In Global stock for delivery in 4-6 working days, delivery time may vary for certain locations or FTZ
Added
Price Each (In a Pack of 25)
MYR2.489
Units | Per Unit | Per Pack* |
25 - 725 | MYR2.489 | MYR62.225 |
750 - 1475 | MYR2.365 | MYR59.125 |
1500 + | MYR2.247 | MYR56.175 |
*price indicative |
- RS Stock No.:
- 153-2935
- Mfr. Part No.:
- 74AUP2G08DC,125
- Manufacturer:
- Nexperia
Technical data sheets
Legislation and Compliance
Product Details
Low-power dual 2-input AND gate, The 74AUP2G08 provides the dual 2-input AND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Low static power consumption, ICC = 0.9 μA (maximum)
Latch-up performance exceeds 100 mA per JESD78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial power-down mode operation
Multiple package options
High noise immunity
Low static power consumption, ICC = 0.9 μA (maximum)
Latch-up performance exceeds 100 mA per JESD78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial power-down mode operation
Multiple package options
For products that are Customized and under Non-cancellable & Non-returnable, Sales & Conditions apply.
Specifications
Attribute | Value |
---|---|
Logic Function | AND |
Mounting Type | Surface Mount |
Number of Elements | 2 |
Number of Inputs per Gate | 2 |
Schmitt Trigger Input | Yes |
Package Type | VSSOP |
Pin Count | 8 |
Logic Family | AUP |
Input Type | CMOS |
Maximum Operating Supply Voltage | 3.6 V |
Maximum High Level Output Current | -4mA |
Maximum Propagation Delay Time @ Maximum CL | 24 @ 30 pF |
Minimum Operating Supply Voltage | 0.8 V |
Maximum Low Level Output Current | 4mA |
Minimum Operating Temperature | -40 °C |
Width | 2.4mm |
Height | 0.85mm |
Dimensions | 2.1 x 2.4 x 0.85mm |
Length | 2.1mm |
Propagation Delay Test Condition | 30pF |
Maximum Operating Temperature | +125 °C |
Output Type | ECL |