- RS Stock No.:
- 216-6213
- Mfr. Part No.:
- 854S006AGILF
- Manufacturer:
- Renesas Electronics
62 In Global stock for delivery in 4-6 working days, delivery time may vary for certain locations or FTZ
Added
Price Each (In a Tube of 62)
MYR134.514
Units | Per Unit | Per Tube* |
62 - 62 | MYR134.514 | MYR8,339.868 |
124 - 186 | MYR131.554 | MYR8,156.348 |
248 + | MYR129.133 | MYR8,006.246 |
*price indicative |
- RS Stock No.:
- 216-6213
- Mfr. Part No.:
- 854S006AGILF
- Manufacturer:
- Renesas Electronics
Technical data sheets
Legislation and Compliance
Product Details
The Renesas Electronics 854S006 is a low skew, high performance 1-to-6, Differential-to-LVDS fanout buffer. The CLK, nCLK pair can accept most standard differential input levels. The 854S006 is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the 854S006 ideal for those clock distribution applications demanding well defined performance and repeatability.
Six differential LVDS outputs
One differential clock input pair
CLK, nCLK pair can accept the following differential input
levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
Maximum output frequency: 1.7GHz
Translates any single-ended input signal to LVDS levels with
resistor bias on nCLK input
Output Skew: 55ps (maximum)
Propagation delay: 850ps (maximum)
Additive phase jitter, RMS: 0.067ps (typical)
Full 3.3V or 2.5V supply
-40°C to 85°C ambient operating temperature
One differential clock input pair
CLK, nCLK pair can accept the following differential input
levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
Maximum output frequency: 1.7GHz
Translates any single-ended input signal to LVDS levels with
resistor bias on nCLK input
Output Skew: 55ps (maximum)
Propagation delay: 850ps (maximum)
Additive phase jitter, RMS: 0.067ps (typical)
Full 3.3V or 2.5V supply
-40°C to 85°C ambient operating temperature
For products that are Customized and under Non-cancellable & Non-returnable, Sales & Conditions apply.
Specifications
Attribute | Value |
---|---|
Logic Family | LVDS |
Logic Function | Clock Buffer |
Input Signal Type | LVDS |
Number of Clock Inputs | 2 |
Package Type | SOIC |
Pin Count | 24 |