Nexperia 74HCT373D,652, 1 D Type Latch, 8-Bit Non-Inverting, 20-Pin SOIC
- RS Stock No.:
- 170-8071
- Mfr. Part No.:
- 74HCT373D,652
- Manufacturer:
- Nexperia
Currently unavailable
We don't know if this item will be back in stock, RS intend to remove it from our range soon.
- RS Stock No.:
- 170-8071
- Mfr. Part No.:
- 74HCT373D,652
- Manufacturer:
- Nexperia
Specifications
Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Nexperia | |
| Logic Family | 74HCT | |
| Logic Function | D Type | |
| Number of Elements per Chip | 1 | |
| Number of Channels per Chip | 8 | |
| Polarity | Non-Inverting | |
| Mounting Type | Surface Mount | |
| Package Type | SO | |
| Pin Count | 20 | |
| Height | 2.45mm | |
| Length | 13mm | |
| Maximum Operating Supply Voltage | 5.5 V | |
| Maximum Operating Temperature | +125 °C | |
| Minimum Operating Supply Voltage | 4.5 V | |
| Dimensions | 13 x 7.6 x 2.45mm | |
| Minimum Operating Temperature | -40 °C | |
| Width | 7.6mm | |
| Select all | ||
|---|---|---|
Brand Nexperia | ||
Logic Family 74HCT | ||
Logic Function D Type | ||
Number of Elements per Chip 1 | ||
Number of Channels per Chip 8 | ||
Polarity Non-Inverting | ||
Mounting Type Surface Mount | ||
Package Type SO | ||
Pin Count 20 | ||
Height 2.45mm | ||
Length 13mm | ||
Maximum Operating Supply Voltage 5.5 V | ||
Maximum Operating Temperature +125 °C | ||
Minimum Operating Supply Voltage 4.5 V | ||
Dimensions 13 x 7.6 x 2.45mm | ||
Minimum Operating Temperature -40 °C | ||
Width 7.6mm | ||
The 74HC373: 74HCT373 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Low switch leakage