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Cypress Semiconductor CY2308SXI-1H PLL Clock Buffer 16-Pin SOIC

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Cypress Semiconductor
unitsPer unit
1 - 4MYR34.50
5 - 9MYR34.02
10 +MYR32.35

The CY2308 is a 3.3 V Zero Delay Buffer designed to distribute high speed clocks in PC, workstation, datacom, telecom, and other high performance applications. The part has an on-chip PLL that locks to an input clock presented on the REF pin. The PLL feedback is driven from external FBK pin, so user has flexibility to choose any one of the outputs as feedback input and connect it to FBK pin. The input-to-output skew is less than 250 ps and output-to-output skew is less than 200 ps. The CY2308 has two banks of four outputs each that is controlled by the select inputs as shown in the table Select Input Decoding on page 3. If all output clocks are not required, Bank B is three-stated. The input clock is directly applied to the output for chip and system testing purposes by the select inputs. The CY2308 PLL enters a power down state when there are no rising edges on the REF input. In this mode, all outputs are three-stated and the PLL is turned off resulting in less than 25 μA of current draw.

Number of Elements per Chip1
Maximum Supply Current70 mA
Maximum Input Frequency133.3MHz
Mounting TypeSurface Mount
Package TypeSOIC
Pin Count16
Dimensions9.98 x 3.98 x 1.47mm
Maximum Operating Supply Voltage3.6 V
Maximum Operating Temperature+85 °C
Maximum Output Frequency133.3MHz
Minimum Operating Supply Voltage3 V
Minimum Operating Temperature-40 °C
Minimum Output Frequency10MHz