Cypress Semiconductor NOR 512Mbit SPI Flash Memory 16-Pin SOIC, S25FS512SAGNFI011

Serial Peripheral Interface (SPI) with Multi-I/O
SPI Clock polarity and phase modes 0 and 3
Double Data Rate (DDR) option
Extended Addressing – 24 or 32-bit address options
Serial Command subset and footprint compatible with
S25FL-A, S25FL-K, S25FL-P, and S25FL-S SPI families
Multi I/O Command subset and footprint compatible with
S25FL-P, and S25FL-S SPI families
Read
Commands: Normal, Fast, Dual I/O, Quad I/O, DDR Quad I/O
Modes: Burst Wrap, Continuous (XIP), QPI
Serial Flash Discoverable Parameters (SFDP) and Common
Flash Interface (CFI), for configuration information.
Program
256 or 512 Bytes Page Programming buffer
Program suspend and resume
Automatic Error Checking and Correction (ECC) – internal hardware ECC with single bit error correction
Erase
Hybrid sector option
Physical set of eight 4-kbytes sectors and one
224-kbytes sector at the top or bottom of address space with all remaining sectors of 256-kbytes
Uniform sector option
Uniform 256-kbyte blocks
Erase suspend and resume
Erase status evaluation
Cycling Endurance
100,000 Program-Erase Cycles, minimum
Data Retention
20 Year Data Retention, minimum
Security Features
One Time Program (OTP) array of 1024 bytes
Block Protection:
Status Register bits to control protection against program or erase of a contiguous range of sectors.
Hardware and software control options
Advanced Sector Protection (ASP)
Individual sector protection controlled by boot code or password
Option for password control of read access
Technology
Cypress 65-nm MirrorBit
 Technology with Eclipse
Architecture
Supply Voltage
1.7 V to 2.0 V
Temperature Range / Grade
Industrial (40 °C to +85 °C)
Industrial Plus (40 °C to +105 °C)
Packages (all Pb-free)
16-lead SOIC 300 mil (SO3016)
WSON 6  8 mm (WNH008)
BGA-24 6  8 mm
•5  5 ball (FAB024) footprint
Known Good Die and Known Tested Die